A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
1. Field of the Invention
This invention relates to host signal processing modems and to methods for information transfers between hardware and interrupt-driven software in computer systems that can miss servicing interrupts.
2. Description of Related Art
A conventional host signal processing (HSP) modem includes dedicated modem hardware that connects to telephone lines and software that the central processor of a host computer executes. The modem hardware receives an analog signal (Rx signal) in compliance with a modem protocol such as v.34 or v.90 from the telephone lines, converts the receive signal into a series of digital samples (Rx samples), and passes the Rx samples to the host computer for processing. The modem hardware also receives digital samples (Tx samples) from the host computer, coverts the Tx samples into an analog signal (Tx signal) in compliance with the protocol, and transmits the Tx signal on the telephone lines. The modem software receives and processes the Rx samples to demodulate the Rx signal and thereby extract received data. The modem software also receives and processes data to be transmitted and generates the Tx samples, which represent the Tx signal.
Recently proposed HSP modems or transceivers include software that the host computer executes to perform only part of the modulation or demodulation required for computation intensive communication standards such as HDSL. Dedicated hardware also performs part of the modulation or demodulation to reduce the loading of the host computer""s central processor. Co-owned U.S. patent application Ser. No. 09/263160, entitled xe2x80x9cHybrid Software/Hardware Discrete Multi-Tone Transceiverxe2x80x9d describes such systems and is hereby incorporated by reference in its entirety. These HSP or hybrid communication systems instead of transferring samples between software and hardware, transfers information such as Fourier transform coefficients.
Both the conventional HSP modems and the hybrid transceivers require a mechanism for transferring information between hardware and software. One modem software architecture uses interrupt-driven routines. For example, a host signal processing modem 100 shown in FIG. 1 includes modem software 122 that a central processor 112 of a host computer 110 executes. Modem software 122 runs under an operating system 120 with applications and other software 124. Modem hardware 130 connects to a system bus 116 of host computer 110 and periodically generates an interrupt signal. Host computer 110 executes an interrupt routine of modem software 122 to service an interrupt from modem hardware 130. The interrupt routine reads a block of Rx samples, processes the Rx samples to extract data, and passes the data to appropriate client. The interrupt routine also checks for data to be transmitted, generates a block of Tx samples representing a portion of the Tx signal, and outputs the Tx samples. Typically, the transfers of Tx and Rx samples are between a buffer in main memory 114 of host computer 110 and a buffer in modem hardware 130. Such transfers can be via DMA transfers or by modem software 122 directly reading from or writing to modem hardware 130 via bus 116. During each period between consecutive interrupts, modem hardware 130 generates the Tx signal based on the block of Tx samples from modem software 122 and accumulates another block of Rx samples from the Rx signal.
A problem can arise when applications or other software 124 stop host computer 110 from servicing of an interrupt from HSP modem hardware 130. When host computer 110 fails to service one or more interrupts, HSP modem hardware 130 can run out of Tx samples to convert. As a result, HSP modem hardware 130 may fail to maintain a Tx signal adequate for the connection on telephone lines 140. Accordingly, a remote device may disconnect. U.S. Pat. No. 5,721,830 and U.S. patent application Ser. No. 09/010,813 describe methods for using circular buffers in modem hardware 130 or main memory 114 to maintain the Tx signal and are hereby incorporated by reference herein in their entirety. The size of the circular buffers can be selected to maintain continuity of the Tx signal from modem hardware 130 so that the remote device does not disconnect. However, during the missed interrupt, modem software 122 does not process the Rx samples, and received data can be lost as samples are overwritten. When host computer 110 resumes servicing the interrupts for the HSP modem, modem software 122 typically must request a re-transmission of the lost data and often must handle a retrain operation. This reduces the data throughput of the HSP modem. Accordingly, an HSP modem architecture is desired that avoids a disconnect or retraining and maintains data throughput even when a host computer fails to service one or more interrupts.
In accordance with an aspect of the invention, a DMA engine continuously transfers data/information between a host computer""s main memory and dedicated modem hardware. The DMA transfers continue even during missed interrupt service. To take advantage of this feature of the DMA engine, modem software fills a large buffer with a reserve of previously generated information representing the transmit signal. Thus, when the host computer skips interrupt service, the DMA engine transfers information from the reserve in the buffer, and modem hardware continues to maintain the transmit signal. The buffer also contains space for received data that the DMA transfers may store in the buffer during missed interrupts. To maintain the buffer in condition to handle future missed interrupts, the modem software, during each serviced interrupt, dynamically determines the amount of data from the buffer to process and the amount of new data to generate.
In an exemplary embodiment of the invention, the HSP modem sets up a transmit buffer in the host computer""s main memory, for DMA transfers from the main memory to modem hardware. The transmit buffer contains N blocks, where one block is the amount of memory required to hold the information representing the transmit signal during one interrupt period. A DMA transfer pointer points to a block in the transmit buffer that contains the information, for example, Tx samples, for the transmit signal during the current interrupt period. A write pointer indicates a second block where the modem software next writes information, and the modem software attempts to maintain about one block of separation is between the DMA transfer pointer and the write pointer. The remaining Nxe2x88x922 blocks in the buffer contain additional information that the DMA engine transfers to the modem hardware during the next Nxe2x88x922 interrupt periods. With the additional data in the transmit buffer, the HSP modem can handle up to Nxe2x88x922 missed interrupts without affecting the transmit signal.
Similarly, a receive buffer in the main memory is dedicated for DMA transfers from the modem hardware to the main memory. The receive buffer contains N blocks, where each block is the amount of memory required to hold the information, for example, Rx samples, received during one interrupt period. Of the N blocks, one block is for the Rx samples to be received during the current interrupt period, and one block contains the data that the modem software should process during the current interrupt period. During normal operations, the remaining Nxe2x88x922 blocks are available for additional received information, and the HSP modem can handle up to Nxe2x88x922 missed interrupts without overwriting or losing received information.
When executed, the modem software determines the number M of missed interrupts. This information can be obtained from the position of the DMA transfer pointer during each interrupt service routine. If the DMA transfer pointer moves one block between consecutive interrupt service routine calls, no interrupts have been missed (M=0). If the DMA transfer pointer moved two blocks, one interrupt was missed (M=1). Similarly, the modem software detects up to Nxe2x88x922 missed interrupts (M=Nxe2x88x922), corresponding to the DMA transfer pointer moving Nxe2x88x921 blocks. To prevent a subsequent missed interrupt from disrupting the transmit signal, the modem software generates more than one block of Tx samples when the interrupt routine detects a previous missed interrupt. In one embodiment of the invention, the modem software generates M+1 blocks of data during an interrupt period to ensure that the transmit buffer is full. Also, to prevent loss of received data, the missed interrupt count M specifies the number of additional blocks of received data that the modem software processes in response to an interrupt. This empties the receive buffer.
Another embodiment of the invention sets a limit K to restrict the number of blocks handled in any given execution of the interrupt service routine. This limits the maximum CPU loading of the HSP modem during any particular interrupt period. The next execution of the interrupt service routine can handle any additional missed interrupts subject to the same restriction that no more than K blocks be processed or generated in a single interrupt period. This process has the benefit of allowing a larger value for N than the host CPU could support if the host CPU was required to process Nxe2x88x921 Rx blocks and generate Nxe2x88x921 Tx blocks.
One embodiment of the invention is a host signal processing modem that includes an interrupt routine. The interrupt routine includes: a first portion that when executed determines a number M of interrupts that a host computer failed to service for the host signal processing modem; and a second portion that determines from the number M an amount of data to process in response to a current interrupt. The host signal processing modem can use a transmit and/or a receive buffer that includes N blocks in the host computer""s main memory. The number N of blocks is greater than two, and each block stores the information for a transmit or receive signal over an interrupt interval.
A process in accordance with an embodiment of the invention includes transferring information between a buffer in a host computer and a hardware portion of a host signal processing modem and executing an interrupt routine in the host computer in response to an interrupt signal. The interrupt routine determines a number M of previous interrupts that the host computer failed to service; selects an amount of information according to the number M of previous unserviced interrupts; and processes the selected amount of information. The processing of the information includes, for example, decoding samples of a receive signal or generating samples of a transmit signal.